Code Generator
Code generator is used to produce the target code for three-address statements. It uses registers to store the operands of the three address statement.
Example:
Consider the three address statement x:= y + z. It can have the following sequence of codes:
Register and Address Descriptors:
- A register descriptor contains the track of what is currently in each register. The register descriptors show that all the registers are initially empty.
- An address descriptor is used to store the location where current value of the name can be found at run time.
A code-generation algorithm:
The algorithm takes a sequence of three-address statements as input. For each three address statement of the form a:= b op c perform the various actions. These are as follows:
- Invoke a function getreg to find out the location L where the result of computation b op c should be stored.
- Consult the address description for y to determine y'. If the value of y currently in memory and register both then prefer the register y' . If the value of y is not already in L then generate the instruction MOV y' , L to place a copy of y in L.
- Generate the instruction OP z' , L where z' is used to show the current location of z. if z is in both then prefer a register to a memory location. Update the address descriptor of x to indicate that x is in location L. If x is in L then update its descriptor and remove x from all other descriptor.
- If the current value of y or z have no next uses or not live on exit from the block or in register then alter the register descriptor to indicate that after execution of x : = y op z those register will no longer contain y or z.
Generating Code for Assignment Statements:
The assignment statement d:= (a-b) + (a-c) + (a-c) can be translated into the following sequence of three address code:
Code sequence for the example is as follows:
Statement |
Code Generated |
Register descriptor Register empty |
Address descriptor |
t:= a - b |
MOV a, R0
SUB b, R0 |
R0 contains t |
t in R0 |
u:= a - c |
MOV a, R1
SUB c, R1 |
R0 contains t
R1 contains u |
t in R0
u in R1 |
v:= t + u |
ADD R1, R0 |
R0 contains v
R1 contains u |
u in R1
v in R1 |
d:= v + u |
ADD R1, R0
MOV R0, d |
R0 contains d |
d in R0
d in R0 and memory |
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