Serial Peripheral Interface (SPI) in AVR Microcontroller
AVR microcontroller support wired communication protocols. Most of the microcontroller comes with internal modules that support communication protocols.
The commonly supported protocols in AVR microcontroller are:
SPI is the simplest protocols among all the communication protocols. 8 Bit data registers inside a device is connected by wires and these data registers works as shift registers for controlling the data exchange inside the SPI network. The device or devices that will controls the operation inside the network is known as the master.
The table for status register of SPI is shown below:
Bit 0 - SPI2X (Double SPI Speed Bit):
When this bit is high then the SPI speed (system clock frequency) will be doubled when the SPI is in master mode. This means the minimum SCK period is 2 CPU clock periods. When the SPI is configured as slave then the SPI is work at lower then clock period frequency.
Bit 1...5-Reserved Bits:
In SPI status register bit 1 to bit 5 is reserved bits used for any further connection operation.
Bit 6-WCOL (Write Collision Flag):
The WCOL bit is set high if the SPI Data Register is used during a data transfer. The WCOL bit is cleared by first reading the SPI register with WCOL set, and then used for accessing the SPI Data Register.
Bit 7-SPIF (SPI Interrupt Flag):
When a serial transfer of data is complete then the SPIF flag is set. SPIF flag is cleared by hardware when executing the corresponding interrupt handling vector.
The table for control register of SPI is shown below:
Enabling the SPI operation in AVR Microcontroller: