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Verilog Multiplexer

A multiplexer is a device that selects one output from multiple inputs. It is also known as a data selector. We refer to a multiplexer with the terms MUX and MPX.

Multiplexers are used in communication systems to increase the amount of data sent over a network within a certain amount of time and bandwidth. It allows us to squeeze multiple data lines into one data line.

It switches between one of the many input lines and combines them one by one to the output. It decides which input line to switch using a control signal.

Physically, a multiplexer has n input pins, one output pin, and m control pins. n = 2^m. Since a multiplexer's job is to select one of the data input lines and send it to the output, it is also known as a data selector.

Verilog Multiplexer

There are three main ways of constructing a multiplexer.

  • Digital multiplexers are made up of logic gates.
  • Analog multiplexers are made using transistors.
  • Mechanical switches or rotary switches are made using rotating shafts.

The MUX itself acts like a digitally controlled multi-position switch where the binary code applied to the select inputs controls the data input, which will be switched to the output.

For example, it transfers data from one of the N inputs to the output based on the select signal. A 4-bit multiplexer would have N inputs each of 4 bits where each input can be transferred to the output by using a select signal.

Verilog Multiplexer

Sel is a 2-bit input and can have four values. Each value on the select line will allow one of the inputs to be sent to the output.

A 4x1 multiplexer can be implemented in multiple ways and here we show two of the most common ways:

1. Using assign statement

The module called mux_4x1_assign has four 4-bit data inputs, one 2-bit select input and one 4-bit data output. The multiplexer will select either a, b, c, or d based on the select signal sel using the assign statement.

2. Using case statement

When we use case statement, then the signal out is declared as a reg type because it is used in a procedural block.

The module called mux_4x1_case has four 4-bit data inputs, one 2-bit select input and one 4-bit data output. The multiplexer will select either a, b, c, or d based on the select signal sel using the case statement.

Uses of Multiplexer

The multiplexer includes the following useful points, such as:

  1. In a communication system where we have a communication network, a multiplexer increases the system's efficiency by allowing audio and video data transmission on a single channel.
  2. In optical fiber communication, a multiplexer does the same job to combine multiple fiber cables onto one fiber cable using a technique called Dense wavelength division multiplexing.
  3. In satellite communication, multiplexers transfer data from the satellite's computer system to the ground segment using GSM communication.
  4. It also works as a parallel to serial data converter.
  5. A computer decreases the number of copper lines necessary to connect the memory to other computer parts.

How to join multiplexers?

If we have small multiplexers, but we want to increase their functionality, we can join them to obtain a MUX with more inputs. The cascading of multiplexers is easy. Ensure that we connect to give the same number of inputs and control lines as the target MUX.

Let's make 4:1 MUX using 2:1 multiplexers. We know that a 2:1 MUX has two inputs and one select line. So joining two 2:1 multiplexers will give us four inputs and two select lines.

We can reduce the outputs to one, so we use another 2:1 MUX to combine two lines to get a single line.

However, though that gives us the one output that we require, it gives us an additional select line. So now we have three select lines.

Now we reduce three select lines to two select lines. We can do that by joining two select lines. That would essentially reduce the two lines to one single line. The following image shows the result we get by applying our logic.

Verilog Multiplexer

8:1 and 16:1 Multiplexers

Similar to the process we saw above, we can design an 8 to 1 multiplexer using 2:1 multiplexers, 16:1 MUX using 4:1 MUX, or 16:1 MUX using 8:1 multiplexer.

Verilog Multiplexer

We can also go the opposite way and use a multiplexer with more inputs than required as a smaller MUX. Here's an 8:1 multiplexer being used as a 2:1 multiplexer.

Verilog Multiplexer


A demultiplexer is a combinational logic circuit that performs the opposite function as that of a multiplexer. A demultiplexer is alternatively referred to as a demux.

In a demux, we have n output lines, one input line, and m select lines. The relation between the number of output lines and the number of select lines is the same as we saw in a multiplexer. That is, 2^m = n. Depending on the value of the binary number formed by the select lines, any one of the output lines connects to the input line.

The rest of the output lines at this point go to an OFF state. That is, the value of the remaining lines is 0.

In this way, a demultiplexer converts serial data to parallel data and acts as a serial-parallel converter. Moreover, since it connects one data line to multiple data lines and switches between them, a demultiplexer is also known as a data distributor. The general symbol of a demultiplexer is shown in the following image.

Verilog Multiplexer

How does a demultiplexer work?

To understand the working of a demultiplexer, we will straight away design one. The 1:2 demux is the simplest of all demultiplexers. We have one input, two outputs, and one select line (2^m = 2, therefore m=1).

Verilog Multiplexer

As we can see, depending on the select line's value, one of the output connects to the input line. When S is 0, the first output line connects to the input. When S is 1, the second output line connects to the input.

In this way, a demultiplexer distributes data from one data line to multiple data lines.

Next, we will design a 1:4 demultiplexer. From the formula for select lines we saw above, a 1:4 demux will have two select lines. Let's draw the truth table for a 1:4 demux.

Truth Table

I0 S0 S1 Y0 Y1 Y2 Y3
I 0 0 I 0 0 0
I 0 1 0 I 0 0
I 1 0 0 0 I 0
I 1 1 0 0 0 I

As we can see, this truth table is shorter than the one for the 4:1 mux because instead of taking both the possible values of the input, we just took it as I. The resulting equations will be the same. So from the truth table, we get,

Y0 = S0'S1'
Y1 = S0'S1
Y2 = S0S1'
Y3 = S0S1

The resultant circuit for the above equations is shown below.

Verilog Multiplexer

Uses of Demultiplexer

Here are some important uses of demultiplexer, such as:

  1. A demultiplexer can receive serial data from a multiplexer present at the transmission end in a communication system. The demux then converts the data into its original form.
  2. We can store an ALU's output in multiple memory registers using a demultiplexer.
  3. The demultiplexer also acts as a serial to parallel converter.

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