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Embedded Systems Multiple Choice Question

Using this Embedded Systems MCQ/Answers, you can crack your college viva/ entrance test and interview with the help of these selected questions.

1) Which design allows the reuse of the software and the hardware components?

  1. Memory Design
  2. Input design
  3. Platform-based design
  4. Peripheral design

Answer: C [ Platform-based design ]

Description: The software and the hardware can be reused using the platform design to cope with the increasing complexity in creating embedded systems.


2) Which design considers both the hardware and software during the embedded design?

  1. Memory Design
  2. Software/ hardware codesign
  3. Platform-based design
  4. Peripheral design

Answer: B [ Software/ hardware codesign ]

Description: It will consider both the hardware and software design concerns. It helps in the right combination of the hardware and the software for the efficient product.


3) What does API stand for?

  1. Application Programming Interface
  2. Address Programming Interface
  3. Accessing peripheral through the interface
  4. None of them

Answer: A [ Application Programming Interface ]

Description: The API stands for Application Programming Interface. It helps in extending the platform towards software applications.


4) Which design activity can be used for the mapping operation to hardware?

  1. High-level transformation
  2. Scheduling
  3. Compilation
  4. Hardware / Software partitioning

Answer: D [ Hardware / Software partitioning ]

Description: The activity is in charge of mapping operations to the software or the hardware.


5) Which process can be used in analyzing the set of possible designs?

  1. Scheduling
  2. Design space exploration
  3. Hardware / Software partitioning
  4. Compilation

Answer: B [ Design Space Exploration ]

Description: It is the process of analyzing the set of designs, and the method which meets the specification is selected.


6) What does FRIDGE stand for?

  1. the floating-point programming design environment
  2. the fixed-point programming design environment
  3. floating-point programming decoding
  4. fixed-point programming decoding

Answer: B [ Fixed-Point Programming Design Environment ]

Description: FRIDGE stands for Fixed-Point programming Design Environment, which can be developed for the optimization programs.


7) Which of the following tool can replace floating-point arithmetic with fixed-point arithmetic?

  1. FAT
  2. SDS
  3. FRIDGE
  4. VFAT

Answer: C [ FRIDGE ]

Description: There are specific tools available for the optimization programs. One such tool is the FRIDGE or fixed-point programming design environment, commercially made available by Synopsys System Studio. This tool can be used in the transformation program, converting floating-point arithmetic to fixed-point arithmetic. This is widely used in signal processing.


8) Which of the following can reduce the loop overhead and thus increase the speed?

  1. loop tiling
  2. Loop unrolling
  3. loop fusion
  4. loop permutation

Answer: B [ Loop unrolling ]

Description: The loop unrolling can reduce the loop overhead, that is, the fewer branches per execution of the loop body, which in turn increases the speed but is only restricted to loops with an endless number of iteration. The unrolling can improve the code size.


9) Which part of the COOL input comprises information about the available hardware platform components?

  1. design constraints
  2. target technology
  3. behavior
  4. both behavior and design constraints

Answer: B [ Target Technology ]

Description: The codesign tool consists of three input ports described as target technology, design constraints, and behavior. Each input does different functions. The target technology comprises information about the various hardware platform components available within the system.


10) What does Index set L denotes?

  1. task graph node
  2. processor
  3. hardware components
  4. task graph node type

Answer: D [ Task Graph Node Type ]

Description: The index set is used in the IP or the integer programming model. The Index set KP denotes the processor, I represent the task graph nodes, and L means the task graph node type.


11) Which design can be used to reduce the energy consumption of the embedded system?

  1. Simulator
  2. Compiler
  3. Emulator
  4. Debugger

Answer: B [ Compiler ]

Description: The compiler can be used to reduce the energy consumption of the embedded system. It performs the available energy optimizations.


12) What is the main ingredient for power optimization?

  1. Power Model
  2. Energy Model
  3. Power Compiler
  4. Watt Model

Answer: A [ Power Model ]

Description: You can save energy at any stage of the embedded system development. High-level optimization techniques can reduce power consumption. Similarly, compiler optimization can also reduce power consumption, and the essential thing in power optimization is the power model.


13) Who proposed the first power model?

  1. Russell
  2. Jacome
  3. Russel and Jacome
  4. Tiwari

Answer: D [Tiwari]

Description: Tiwari proposed the first power model in the year 1974. The model includes the so-called bases and the inter-instruction instructions. The education's base costs correspond to the energy consumed per instruction execution when an infinite sequence of that instruction is executed. Inter instruction costs model the additional power consumed by the processor if instructions change.


14) Which model is based on precise measurements using real hardware?

  1. First power model
  2. Encc energy-aware compiler
  3. Second Power Model
  4. Third power model

Answer: encc energy-aware compiler

Description: The enccenergy-aware compiler uses the energy model by Steinke et al. it is based on the actual hardware's precise measurements. The power consumption of the memory, as well as the processor, is included in this model.


15) How can one compute the power consumption of the cache?

  1. First power model
  2. Lee power model
  3. CACTI
  4. Third power model

Answer: C [ CACTI ]

Description: The CACTI can compute the cache's power consumption, which Wilton and Jouppi proposed in 1996.


16) Which of the following function can interpret data in the C language?

  1. Scanf
  2. Printf
  3. File
  4. Proc

Answer: A [ Scanf ]

Description: The scanf and printf are the C language functions used to interpret data and print data.


17) Which statement replaces all occurrences of the identifier with string?

  1. # include
  2. # define identifier string
  3. # ifdef
  4. # define MACRO()

Answer: B [ #define identifier string ]

Description: # define statement can replace all occurrences of the identifier with string. Similarly, it can determine the constants, which also makes the code easier to understand.


18) Which of the following is also known as loader?

  1. Linker
  2. Locator
  3. Assembler
  4. Compiler

Answer: A [ Linker ]

Description: The linker is also known as a loader. It can take the object file and searches the library files to find the routine it calls.


19) Which command takes the object file and searches library files to find the routine calls?

  1. Emulator
  2. Simulator
  3. Linker
  4. Debugger

Answer: C [ Linker ]

Description: The linker is also known as a loader. It can take the object file and searches the library files to find the routine it calls. The linker can give the programmer the final control concerning how unresolved references are reconciled, where the sections are located in the memory, which routines are used, etc.


20) Which of the following language can describe the hardware?

  1. C++
  2. C
  3. VHDL
  4. JAVA

Answer: C [ VHDL ]

Description: The VHDL is the hardware description language that describes the hardware, whereas C, C++, and JAVA are software languages.


21) Which simulator/ debugger is capable of displaying output signal waveform resulting from stimuli applied to the inputs?

  1. VHDL emulator
  2. VHDL simulator
  3. VHDL locator
  4. VHDL debugger

Answer: B [ VHDL Simulator ]

Description: The VHDL simulator can display the output signal waveforms that result from the stimuli or trigger applied to the input.


22) What describes the connections between the entity port and the local component?

  1. One-to-one map
  2. Many-to-one map
  3. One-to-many maps
  4. Port map

Answer: D [ Port map ]

Description: The port map describes the connection between the entity port and the local component. The component is declared by component declaration, and the entity ports are mapped with the port mapping.


23) Which of the following is an abstraction of the signal impedance?

  1. Strength
  2. Nature
  3. Size
  4. Level

Answer: D [ Size ]

Description: Most of the systems contain electrical signals of different strengths and levels. The signal's level is the abstraction of the signal voltage, and the power is the abstraction of the signal impedance.


24) How many types of wait statements are available in the VHDL design?

  1. 4
  2. 3
  3. 6
  4. 5

Answer: A [ 4 ]

Description: There are four kinds of wait statements. These are waiting on, wait for, wait until and wait.


25) Which of the following is a C++ class library?

  1. C
  2. JAVA
  3. SystemC
  4. C++

Answer: C [ SystemC ]

Description: System C is a C++ class library that helps solve behavioral, resolution, simulation time problems.


26) Which C++ class is similar to the hardware description language like VHDL?

  1. Verilog
  2. C
  3. JAVA
  4. SystemC

Answer: D [ SystemC ]

Description: SystemC is a C++ class similar to the hardware description languages like VHDL and Verilog. The execution and simulation time in the SystemC is almost identical to the VHDL.


27) Which of the following is standardized as IEEE 1364?

  1. C++
  2. C
  3. Verilog
  4. FORTRAN

Answer: C [ Verilog ]

Description: It is a hardware description language. Verilog was developed for modeling hardware and electronic devices. It is then standardized by the IEEE standard 1364.


28) Which of the following is an analog extension of the VHDL?

  1. System VHDL
  2. VHDL-AMS
  3. System Verilog
  4. Verilog

Answer: B [ VHDL-AMS ]

Description: The extension of the VHDL includes the analog and mixed behavior of the signals.


29) Which level simulates the algorithms that are used within the embedded systems?

  1. Circuit Level
  2. Gate Level
  3. Algorithmic Level
  4. Switch Level

Answer: Algorithmic Level

Description: It simulates the algorithm which is used within the embedded system.


30) Which of the following models the components like resistors, capacitors, etc.?

  1. Layout model
  2. Register-transfer level
  3. Switch-level model
  4. Circuit level model

Answer: D [ Circuit level model ]

Description: This simulation can be used for the circuit theory and its components such as the resistors, inductors, capacitors, voltage sources, current sources. This simulation also involves partial differential equations.


31) Which models communicate between the components?

  1. fine-grained modeling
  2. transaction level modeling
  3. circuit-level model
  4. coarse-grained modeling

Answer: B [ Transaction level modeling ]

Description: The transaction-level modeling is a type of instruction set level model. This modeling helps in the modeling of components which is used for the communication purpose. It also models the transaction, such as read and writes cycles.


32) Which model is used to denote the Boolean functions?

  1. gate-level model
  2. switch level
  3. layout model
  4. circuit level

Answer: A [ Gate Level model ]

Description: The gate-level model is used to denote the boolean functions, and the simulation only considers the gate's behavior.


33) n which model, the effect of instruction is simulated, and their timing is not considered?

  1. circuit model
  2. gate-level model
  3. layout model
  4. coarse-grained model

Answer: D [ coarse-grained model ]

Description: The coarse-grained model is a kind of instruction set level modeling in which only the effect of instruction is simulated, and the timing is not considered. The information which is provided in the manual is sufficient for this type of modeling.


34) Which of the following is a set of specially selected input patterns?

  1. debugger pattern
  2. test pattern
  3. byte pattern
  4. bit pattern

Answer: B [ Test pattern ]

Description: While testing any devices or embedded systems, we apply some selected inputs known as the test pattern and observe the output. This output is compared with the expected outcome. The test patterns usually are used in the already manufactured systems.


35) Which of the following have flip-flops which are connected to form shift registers?

  1. test pattern
  2. scan design
  3. CRC
  4. bit pattern

Answer: B [ Scan Design ]

Description: All the flip-flop storing states are connected to form a shift register in the scan design. It is a kind of test path.


36) Which gate is used in the geometrical representation if a single event causes hazards?

  1. NOT
  2. OR
  3. AND
  4. NAND

Answer: B [ OR ]

Description: The fault tree analysis is done graphically using gates, mainly AND gates and OR gates. The OR gate is used to represent a single event that is hazardous. Similarly, AND gates are used in the graphical representation if several events cause hazards.


37) Which of the following can compute the exact number of clock cycles required to run an application?

  1. coarse-grained model
  2. layout model
  3. register-transaction model
  4. fine-grained model

Answer: D [ fine-grained model ]

Description: The fine-grained model has the cycle-true instruction set simulation. In this modeling, it is possible to compute the exact number of clock cycles required to run an application.


38) Which of the following is possible to locate errors in the specification of the future bus protocol?

  1. HOL
  2. EMC
  3. FOL
  4. BDD

Answer: D [ BDD ]

Description: The model checking was developed using the binary decision diagram and the BDD, and it was possible to locate errors in the specification of the future bus protocol.


39) What is CTL?

  1. code tree logic
  2. CPU tree logic
  3. computer tree logic
  4. computational tree logic

Answer: D [Computational tree logic ]

Description: The EMC-system is a popular system for model checking developed by Clark that describes the CTL formulas, also known as computational tree logic. The CTL consist of two parts, a path quantifier and a state quantifier.


40) Which is a top-down method of analyzing risks?

  1. FMEA
  2. FTA
  3. Damages
  4. Hazards

Answer: B [ FTA ]

Description: The FTA is Fault tree analysis which is a top-down method of analyzing risks. It starts with damage and comes up with the reasons for the damage. The research is done graphically by using gates.


41) Which of the following microprocessor is designed by Zilog?

  1. Zigbee
  2. Z80
  3. 8087
  4. 80386

Answer: B [ Z80 ]

Description: Designed by Zilog in 1976. 80386 and 8087 are the processors designed by Intel, and Zigbee is IEEE based, which is used for high-level communication protocol.


42) How an alternate set of the register can be identified in Z80?

  1. 'Prefix
  2. 'Suffix
  3. , prefix
  4. , suffix

Answer: B [ 'Suffix ]

Description: To identify the main register and alternate register ' is used in the suffix.


43) What is the purpose of the memory refresh register of Z80?

  1. To control on-chip SRAM
  2. To control on-chip DRAM
  3. To clear cache
  4. To control ROM

Answer: B [ To control on-chip SRAM ]

Description: In addition to the general-purpose registers, a stack pointer, program counter, and two index registers are included in Z80. It was also used in many embedded designs because of its high-quality performance and its in-built refresh circuitry for DRAMs.


44) Which signal is used to differentiates the access from a standard memory cycle?

  1. RESET
  2. HALT
  3. IORQ
  4. MREQ

Answer: C [ IORQ ]

Description: The IORQ signal is used to differentiate the access from a standard memory cycle. These input/output accesses are similar from a hardware perspective to a memory cycle but only occur when an input/output port instruction is executed.


45) What supports multitasking in 80386?

  1. External paging memory management unit
  2. Read mode
  3. On-chip paging memory management unit
  4. Paging and segmentation

Answer: C [ On-chip paging memory management unit ]

Description: Because of the efficient paging mechanism of 80386 in the memory management unit, it supports multitasking. That is, different tasks can be done at a time, a kind of parallel port.


46) Which one of the following is the successor of the 8086 and 8088 processor?

  1. 80387
  2. 80286
  3. 8087
  4. 8051

Answer: B [ 80286 ]

Description: 80286 is the successor of 8086 and 8088 because it possesses a CPU based on 8086 and 8088. 8051 is a microcontroller designed by Intel which is commonly known as Intel MCS-51. 8087 is the first floating-point coprocessor of 8086.


47) Which are the two modes of 80286?

  1. Mode1 and mode2
  2. Mode A and mode B
  3. Real mode and protected mode
  4. Alternate and main

Answer: C [ Real mode and protected mode ]

Description: It possesses two modes which are called fundamental and protected methods. In natural ways, it adds some additional register to access a size greater than 16MB but still preserves its compatibility with 8086 and 8088.


48) When is the register set gets expanded in 80286?

  1. In expanded mode
  2. Interrupt mode
  3. In real mode
  4. In protected mode

Answer: D [ In protected mode ]

Description: In protected mode, two additional register instances are called index register and base pointer register, which helps expand the register.


49) Which of the following processors can perform exponential, logarithmic, and trigonometric functions?

  1. 8087
  2. 8088
  3. 8086
  4. 8080

Answer: A [ 8087 ]

Description: 8087 is a coprocessor that can perform all the mathematical functions, including addition, subtraction, multiplication, division, exponential, logarithmic, trigonometric, etc. 8086, 8080, and 8088 are microprocessors that require the help of a coprocessor for floating-point arithmetic.


50) How are negative numbers stored in a coprocessor?

  1. Decimal
  2. Gray
  3. 1's complement
  4. 2's complement

Answer: D [ 2's complement ]

Description: In a coprocessor, negative numbers are stored in 2's complement with its leftmost sign bit of 1, whereas positive numbers are stored in the form of actual value with its leftmost sign bit of 0.


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