DecoderThe combinational circuit that change the binary information into 2^{N} output lines is known as Decoders. The binary information is passed in the form of N input lines. The output lines define the 2^{N}bit code for the binary information. In simple words, the Decoder performs the reverse operation of the Encoder. At a time, only one input line is activated for simplicity. The produced 2^{N}bit output code is equivalent to the binary information. There are various types of decoders which are as follows: 2 to 4 line decoder:In the 2 to 4 line decoder, there is a total of three inputs, i.e., A_{0}, and A_{1} and E and four outputs, i.e., Y_{0}, Y_{1}, Y_{2}, and Y_{3}. For each combination of inputs, when the enable 'E' is set to 1, one of these four outputs will be 1. The block diagram and the truth table of the 2 to 4 line decoder are given below. Block Diagram:Truth Table:The logical expression of the term Y0, Y0, Y2, and Y3 is as follows: Y_{3}=E.A_{1}.A_{0} Logical circuit of the above expressions is given below: 3 to 8 line decoder:The 3 to 8 line decoder is also known as Binary to Octal Decoder. In a 3 to 8 line decoder, there is a total of eight outputs, i.e., Y_{0}, Y_{1}, Y_{2}, Y_{3}, Y_{4}, Y_{5}, Y_{6}, and Y_{7} and three outputs, i.e., A_{0}, A1, and A_{2}. This circuit has an enable input 'E'. Just like 2 to 4 line decoder, when enable 'E' is set to 1, one of these four outputs will be 1. The block diagram and the truth table of the 3 to 8 line encoder are given below. Block Diagram:Truth Table:The logical expression of the term Y_{0}, Y_{1}, Y_{2}, Y_{3}, Y_{4}, Y_{5}, Y_{6}, and Y_{7} is as follows: Y_{0}=A_{0}'.A_{1}'.A_{2}' Logical circuit of the above expressions is given below: 4 to 16 line DecoderIn the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y_{0}, Y_{1}, Y_{2},……, Y_{16} and four inputs, i.e., A_{0}, A1, A_{2}, and A_{3}. The 3 to 16 line decoder can be constructed using either 2 to 4 decoder or 3 to 8 decoder. There is the following formula used to find the required number of lowerorder decoders. Required number of lower order decoders=m_{2}/m_{1} m_{1} = 8 Required number of 3 to 8 decoders==2 Block Diagram:Truth Table:The logical expression of the term A0, A1, A2,…, A15 are as follows: Y_{0}=A_{0}'.A_{1}'.A_{2}'.A_{3}' Logical circuit of the above expressions is given below:
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