Multiplexer

A multiplexer is a combinational circuit that has 2ⁿ input lines and a single output line. Simply, the multiplexer is a multi-input and single-output combinational circuit. The binary information is received from the input lines and directed to the output line. On the basis of the values of the selection lines, one of these data inputs will be connected to the output.

Unlike encoder and decoder, there are n selection lines and 2ⁿ input lines. So, there is a total of 2^N possible combinations of inputs. A multiplexer is also treated as Mux.

There are various types of the multiplexer which are as follows:

2×1 Multiplexer:

In 2×1 multiplexer, there are only two inputs, i.e., A₀ and A₁, 1 selection line, i.e., S₀ and single outputs, i.e., Y. On the basis of the combination of inputs which are present at the selection line S⁰, one of these 2 inputs will be connected to the output. The block diagram and the truth table of the 2×1 multiplexer are given below.

Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y=S₀'.A₀+S₀.A₁

Logical circuit of the above expression is given below:

4×1 Multiplexer:

In the 4×1 multiplexer, there is a total of four inputs, i.e., A₀, A₁, A₂, and A₃, 2 selection lines, i.e., S₀ and S₁ and single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S⁰ and S₁, one of these 4 inputs are connected to the output. The block diagram and the truth table of the 4×1 multiplexer are given below.

Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y=S₁' S₀' A₀+S₁' S₀ A₁+S₁ S₀' A₂+S₁ S₀ A₃

Logical circuit of the above expression is given below:

8 to 1 Multiplexer

In the 8 to 1 multiplexer, there are total eight inputs, i.e., A₀, A₁, A₂, A₃, A₄, A₅, A₆, and A₇, 3 selection lines, i.e., S₀, S₁and S₂ and single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S⁰, S^1, and S₂, one of these 8 inputs are connected to the output. The block diagram and the truth table of the 8×1 multiplexer are given below.

Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y=S₀'.S₁'.S₂'.A₀+S₀.S₁'.S₂'.A₁+S₀'.S₁.S₂'.A₂+S₀.S₁.S₂'.A₃+S₀'.S₁'.S₂ A₄+S₀.S₁'.S₂ A₅+S₀'.S₁.S₂ .A₆+S₀.S₁.S₃.A₇

Logical circuit of the above expression is given below:

8 ×1 multiplexer using 4×1 and 2×1 multiplexer

We can implement the 8×1 multiplexer using a lower order multiplexer. To implement the 8×1 multiplexer, we need two 4×1 multiplexers and one 2×1 multiplexer. The 4×1 multiplexer has 2 selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1 selection line.

For getting 8 data inputs, we need two 4×1 multiplexers. The 4×1 multiplexer produces one output. So, in order to get the final output, we need a 2×1 multiplexer. The block diagram of 8×1 multiplexer using 4×1 and 2×1 multiplexer is given below.

16 to 1 Multiplexer

In the 16 to 1 multiplexer, there are total of 16 inputs, i.e., A₀, A₁, …, A₁₆, 4 selection lines, i.e., S₀, S₁, S₂, and S₃ and single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S⁰, S¹, and S₂, one of these 16 inputs will be connected to the output. The block diagram and the truth table of the 16×1

Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Logical circuit of the above expression is given below:

16×1 multiplexer using 8×1 and 2×1 multiplexer

We can implement the 16×1 multiplexer using a lower order multiplexer. To implement the 8×1 multiplexer, we need two 8×1 multiplexers and one 2×1 multiplexer. The 8×1 multiplexer has 3 selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1 selection line.

For getting 16 data inputs, we need two 8 ×1 multiplexers. The 8×1 multiplexer produces one output. So, in order to get the final output, we need a 2×1 multiplexer. The block diagram of 16×1 multiplexer using 8×1 and 2×1 multiplexer is given below.