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Bus Arbitration in Computer Organization

What is Bus Arbitration?

Bus Arbitration is the procedure by which the active bus master accesses the bus, relinquishes control of it, and then transfers it to a different bus-seeking processor unit. A bus master is a controller that can access the bus for a given instance.

A conflict could occur if multiple DMA controllers, other controllers, or processors attempt to access the common bus simultaneously, yet only one is permitted to access. Bus master status can only be held by one processor or controller at once. By coordinating the actions of all devices seeking memory transfers, the Bus Arbitration method is used to resolve these disputes.

Two approaches are followed for the bus Arbitration:

  1. Centralized Bus Arbitration - In which the necessary arbitration is carried out by a lone bus arbitrator.
  2. Distributive Bus Arbitration - In which every device takes part in choosing the new bus master. A 4bit identification number is allocated to each device on the bus. The created ID will decide the device's priority.

Centralized Bus Arbitration Methodologies

There are three methods of Centralized Bus Arbitration, which are listed below:

1. Daily Chaining Method - All bus masters work on the same line to make bus requests in this straightforward and less expensive approach. Up until it comes across the first master who is making a request for access to the bus, the bus grant signal travels serially through each master. Any other seeking module will not receive the grant signal and hence be unable to access the bus since this master prevents the bus grant signal from propagating.

Any device linked to the bus, such as the processor or any DMA controller unit, may act as the bus master throughout any bus cycle.

Its Advantages:

  • It is scalable and provides simplicity
  • The user is free to add multiple devices to a predefined number of maximum devices wherever he wants along the chain.

Its Disadvantages:

  • A device's priority value is determined by the location of the master bus.
  • Using this strategy results in propagation delay.
  • The entire system will cease to function if one gadget malfunctions.

2. Rotating or Polling Priority Method - The address lines needed depend on how many connected masters are in the system. The controller is utilized to produce the unique priority for the master (or address). A series of master addresses are generated by the controller. The bus is used once the asking master knows its address and activates the busy line.

Its Advantages:

  • This approach is neutral in terms of processor and device preferences.
  • The process is also straightforward.

Its Disadvantages:

  • It is challenging to add bus masters since it increases the circuit's address line count.
  • The system will continue to function even if one device malfunctions.

3. Independent Request or Fixed Priority Method - A unique pair of bus requests and bus grant lines are provided to each master, and each pair is given a priority. The controller's built-in priority decoder chooses the utmost priority request and then asserts the matching bus grant signal.

Its Advantage:

  • This technique produces a quick response.

Its Disadvantage:

  • A significant number of control lines are needed, which raises the cost of the hardware.

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