A Decoder can be described as a combinational circuit that converts binary information from the 'n' coded inputs to a maximum of 2^n different outputs.
Note: A binary code of n bits is capable of representing up to 2^n distinct elements of the coded information.
The most preferred or commonly used decoders are n-to-m decoders, where m<= 2^n.
An n-to-m decoder has n inputs and m outputs and is also referred to as an n * m decoder.
The following image shows a 3-to-8 line decoder with three input variables which are decoded into eight output, each output representing one of the combinations of the three binary input variables.
The three inverter gates provide the complement of the inputs corresponding to which the eight AND gates at the output generates one binary combination for each input.
The most common application of this decoder is binary-to-octal conversion.
The truth table for a 3-to-8 line decoder can be represented as:
Let us consider an example of 2-to-4 line NAND Gate Decoder which uses NAND Gates instead of AND gate in the central logic.
The following image shows a 2-to-4 line decoder with NAND gates.
The truth table for a 2-to-4 line decoder can be represented as:
It is also possible to combine two or more decoders to form a large decoder whenever needed. For instance, we can construct a 3 * 8 decoder by combining two 2 *4 decoders.
The following image shows a 3 * 8 decoder constructed with two 2 * 4 decoders.